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? 2011 microchip technology inc. ds21696g-page 1 mcp6541/1r/1u/2/3/4 features: ? low quiescent current: 600 na/comparator (typ.) ? rail-to-rail input: v ss - 0.3v to v dd + 0.3v ? cmos/ttl-compatible output ? propagation delay: 4 s (typ., 100 mv overdrive) ? wide supply voltage range: 1.6v to 5.5v ? available in single, dual and quad ? single available in sot-23-5, sc-70-5 * packages ? chip select (cs ) with mcp6543 ? low switching current ? internal hysteresis: 3.3 mv (typ.) ? temperature ranges: - industrial: -40c to +85c - extended: -40c to +125c typical applications: ? laptop computers ? mobile phones ? metering systems ? hand-held electronics ? rc timers ? alarm and monitoring circuits ? windowed comparators ? multi-vibrators related devices: ? open-drain output: mcp6546/7/8/9 description: the microchip technology inc. mcp6541/1r/1u/2/3/4 family of comparators is offered in single (mcp6541, MCP6541R, mcp6541u), single with chip select (cs ) (mcp6543), dual (mcp6542) and quad (mcp6544) configurations. the outputs are push-pull (cmos/ttl- compatible) and are capable of driving heavy dc or capacitive loads. these comparators are optimized for low-power, single-supply operation with greater than rail-to-rail input operation. the push-pull output of the mcp6541/ 1r/1u/2/3/4 family supports rail-to-rail output swing and interfaces with ttl/cmos logic. the internal input hysteresis eliminates output switching due to internal input noise voltage, reducing current draw. the output limits supply current surges and dynamic power consumption while switching. this product family operates with a single-supply voltage as low as 1.6v and draws less than 1 a/comparator of quiescent current. the related mcp6546/7/8/9 family of comparators from microchip has an open-drain output. used with a pull- up resistor, these devices can be used as level-shifters for any desired voltage up to 10v and in wired-or logic. * sc-70-5 e-temp parts not available at this release of the data sheet. mcp6541u sot-23-5 is e-temp only. package types v in + v in ? mcp6541 v ss v dd out 1 2 3 4 8 7 6 5 - + nc nc nc pdip, soic, msop 4 1 2 3 - + 5 sot-23-5 v dd out v in + v ss v in ? mcp6542 v ina + v ina ? v ss 1 2 3 4 8 7 6 5 - outa + - + v dd outb v inb ? v inb + v in + v in ? mcp6543 v ss v dd out 1 2 3 4 8 7 6 5 - + nc cs nc pdip, soic, msop pdip, soic, msop mcp6544 v ina + v ina ? v ss 1 2 3 4 14 13 12 11 - outa + - + v dd outd v ind ? v ind + 10 9 8 5 6 7 outb v inb ? v inb +v inc + v inc ? outc + - - + pdip, soic, tssop 4 1 2 3 - + 5 sot-23-5, sc-70-5 v ss out v in + v dd v in ? mcp6541 - + MCP6541R 4 1 2 3 5 sot-23-5 v ss v in + v in ? v dd out mcp6541u - + push-pull output sub-m icroamp comparators
mcp6541/1r/1u/2/3/4 ds21696g-page 2 ? 2011 microchip technology inc. notes:
? 2011 microchip technology inc. ds21696g-page 3 mcp6541/1r/1u/2/3/4 1.0 electrical characteristics absolute maximum ratings ? v dd - v ss .........................................................................7.0v current at analog input pin (v in +, v in -.........................2 ma analog input (v in ) ?? ...................... v ss - 1.0v to v dd + 1.0v all other inputs and outputs........... v ss - 0.3v to v dd + 0.3v difference input voltage ....................................... |v dd - v ss | output short-circuit current ................................ continuous current at input pins ....................................................2 ma current at output and supply pins ............................30 ma storage temperature .....................................-65c to +150c maximum junction temperature (t j ) .......................... +150c esd protection on all pins (hbm;mm) ...................4 kv; 400v ? notice: stresses above those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listi ngs of this specification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. ?? see section 4.1.2 ?input voltage and current limits? dc characteristics electrical specifications: unless otherwise indicated, v dd = +1.6v to +5.5v, v ss = gnd, t a = +25c,v in + = v dd /2, v in ? = v ss , and r l = 100 k ? to v dd /2 (refer to figure 1-3 ). parameters sym min typ max units conditions power supply supply voltage v dd 1.6 ? 5.5 v quiescent current per comparator i q 0.3 0.6 1.0 a i out = 0 input input voltage range v cmr v ss ? 0.3 ? v dd +0.3 v common mode rejection ratio cmrr 55 70 ? db v dd = 5v, v cm = -0.3v to 5.3v common mode rejection ratio cmrr 50 65 ? db v dd = 5v, v cm = 2.5v to 5.3v common mode rejection ratio cmrr 55 70 ? db v dd = 5v, v cm = -0.3v to 2.5v power supply rejection ratio psrr 63 80 ? db v cm = v ss input offset voltage v os -7.0 1.5 +7.0 mv v cm = v ss ( note 1 ) drift with temperature ? v os / ? t a ? 3 ? v/c t a = -40c to +125c, v cm = v ss input hysteresis voltage v hyst 1.5 3.3 6.5 mv v cm = v ss ( note 1 ) linear temp. co. ( note 2 ) tc 1 ? 6.7?v/ct a = -40c to +125c, v cm = v ss quadratic temp. co. ( note 2 ) tc 2 ? -0.035 ? v/c 2 t a = -40c to +125c, v cm = v ss input bias current i b ?1?pav cm = v ss at temperature (i-temp parts) i b ? 25 100 pa t a = +85c, v cm = v ss ( note 3 ) at temperature (e-temp parts) i b ? 1200 5000 pa t a = +125c, v cm = v ss ( note 3 ) input offset current i os ? 1 ? pa v cm = v ss common mode input impedance z cm ?10 13 ||4 ? ? ||pf differential input impedance z diff ?10 13 ||2 ? ? ||pf note 1: the input offset voltage is the center (average) of the input-re ferred trip points. the input hy steresis is the difference between the input-referred trip points. 2: v hyst at different temperatur es is estimated using v hyst (t a ) = v hyst + (t a - 25c) tc 1 + (t a - 25c) 2 tc 2 . 3: input bias current at temperature is not tested for sc-70-5 package. 4: limit the output current to absolute maximum rating of 30 ma.
mcp6541/1r/1u/2/3/4 ds21696g-page 4 ? 2011 microchip technology inc. ac characteristics push-pull output high-level output voltage v oh v dd ? 0.2 ? ? v i out = -2 ma, v dd = 5v low-level output voltage v ol ??v ss +0.2 v i out = 2 ma, v dd = 5v short-circuit current i sc ? -2.5, +1.5 ? ma v dd = 1.6v ( note 4 ) i sc ?30?mav dd = 5.5v ( note 4 ) electrical specifications: unless otherwise indicated, v dd = +1.6v to +5.5v, v ss = gnd, t a = +25c, v in + = v dd /2, step = 200 mv, overdrive = 100 mv, and c l = 36 pf (refer to figure 1-2 and figure 1-3 ). parameters sym min typ max units conditions rise time t r ?0.85? s fall time t f ?0.85? s propagation delay (high-to-low) t phl ?4 8s propagation delay (low-to-high) t plh ?4 8s propagation delay skew t pds ?0.2? s ( note 1 ) maximum toggle frequency f max ? 160 ? khz v dd = 1.6v f max ? 120 ? khz v dd = 5.5v input noise voltage e ni ? 200 ? v p-p 10 hz to 100 khz note 1: propagation delay skew is defined as: t pds = t plh - t phl . dc characteristics (continued) electrical specifications: unless otherwise indicated, v dd = +1.6v to +5.5v, v ss = gnd, t a = +25c,v in + = v dd /2, v in ? = v ss , and r l = 100 k ? to v dd /2 (refer to figure 1-3 ). parameters sym min typ max units conditions note 1: the input offset voltage is the center (average) of the input -referred trip points. the input hysteresis is the difference between the input-referred trip points. 2: v hyst at different temperatur es is estimated using v hyst (t a ) = v hyst + (t a - 25c) tc 1 + (t a - 25c) 2 tc 2 . 3: input bias current at temperature is not tested for sc-70-5 package. 4: limit the output current to absolute maximum rating of 30 ma.
? 2011 microchip technology inc. ds21696g-page 5 mcp6541/1r/1u/2/3/4 figure 1-1: timing diagram for the cs pin on the mcp6543. figure 1-2: propagation delay timing diagram. mcp6543 chip select (cs ) characteristics electrical specifications: unless otherwise indicated, v dd = +1.6v to +5.5v, v ss = gnd, t a = +25c, v in + = v dd /2, v in ? = v ss , and c l = 36 pf (refer to figures 1-1 and 1-3 ). parameters sym min typ max units conditions cs low specifications cs logic threshold, low v il v ss ?0.2v dd v cs input current, low i csl ?5.0?pacs = v ss cs high specifications cs logic threshold, high v ih 0.8 v dd ?v dd v cs input current, high i csh ?1?pacs = v dd cs input high, v dd current i dd ?18?pacs = v dd cs input high, gnd current i ss ? ?20 ? pa cs = v dd comparator output leakage i o(leak) ?1?pav out = v dd , cs = v dd cs dynamic specifications cs low to comparator output low turn-on time t on ?250mscs = 0.2 v dd to v out = v dd /2, v in ? = v dd cs high to comparator output high z turn-off time t off ?10?scs = 0.8 v dd to v out = v dd /2, v in ? = v dd cs hysteresis v cs_hyst ?0.6? vv dd = 5v v il hi-z t on v ih cs t off v out -20 pa (typ.) hi-z i ss i cs 1pa (typ.) 1pa (typ.) -20 pa (typ.) -0.6 a (typ.) v ol t plh v out v in ? 100 mv 100 mv t phl v ol v in + = v dd /2 v oh
mcp6541/1r/1u/2/3/4 ds21696g-page 6 ? 2011 microchip technology inc. temperature characteristics 1.1 test circuit configuration this test circuit configuration is used to determine the ac and dc specifications. figure 1-3: ac and dc test circuit for the push-pull output comparators. electrical specifications: unless otherwise indicated, v dd = +1.6v to +5.5v and v ss = gnd. parameters sym min typ max units conditions temperature ranges specified temperature range t a -40 ? +85 c operating temperature range t a -40 ? +125 c note storage temperature range t a -65 ? +150 c thermal package resistances thermal resistance, 5l-sc-70 ? ja ?331?c/w thermal resistance, 5l-sot-23 ? ja ?256?c/w thermal resistance, 8l-pdip ? ja ?85?c/w thermal resistance, 8l-soic ? ja ?163?c/w thermal resistance, 8l-msop ? ja ?206?c/w thermal resistance, 14l-pdip ? ja ?70?c/w thermal resistance, 14l-soic ? ja ?120?c/w thermal resistance, 14l-tssop ? ja ?100?c/w note: the mcp6541/1r/1u/2/3/4 i-temp parts operate over this extended temperature range, but with reduced performance. in any case, the junction temperature (t j ) must not exceed the absolute maximum specification of +150c. v dd v ss = 0v 200 k ? 200 k ? 200 k ? 200 k ? v out v in = v ss 36 pf mcp654x
? 2011 microchip technology inc. ds21696g-page 7 mcp6541/1r/1u/2/3/4 2.0 typical performance curves note: unless otherwise indicated, v dd = +1.6v to +5.5v, v ss = gnd, t a = +25c, v in + = v dd /2, v in ? = gnd, r l = 100 k ? to v dd /2, and c l = 36 pf. figure 2-1: input offset voltage at v cm =v ss . figure 2-2: input offset voltage drift at v cm =v ss . figure 2-3: the mcp6541/1r/1u/2/3/4 comparators show no phase reversal. figure 2-4: input hysteresis voltage at v cm =v ss . figure 2-5: input hysteresis voltage linear temp. co. (tc 1 ) at v cm =v ss . figure 2-6: input hysteresis voltage quadratic temp. co. (tc 2 ) at v cm =v ss . note: the graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. the performance characteristics listed herein are not tested or guaranteed. in some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. 0% 2% 4% 6% 8% 10% 12% 14% -7-6-5-4-3-2-101234567 input offset voltage (mv) percentage of occurrences 1200 samples v cm = v ss 0% 2% 4% 6% 8% 10% 12% 14% 16% -14 -12 -10 -8 -6 -4 -2 0 2 4 6 8 10 12 14 input offset voltage drift (v/c) percentage of occurrences 1200 samples v cm = v ss t a = -40c to +125c -1 0 1 2 3 4 5 6 7 012345678910 time (1 ms/div) inverting input, output voltage (v) v out v in ? v dd = 5.5v 0% 2% 4% 6% 8% 10% 12% 14% 16% 18% 1.6 2.0 2.4 2.8 3.2 3.6 4.0 4.4 4.8 5.2 5.6 6.0 input hysteresis voltage (mv) percentage of occurrences 1200 samples v cm = v ss 0% 5% 10% 15% 20% 25% 4.6 5.0 5.4 5.8 6.2 6.6 7.0 7.4 7.8 8.2 8.6 9.0 9.4 input hysteresis voltage ? linear temp. co.; tc 1 (v/c) percentage of occurrences 596 samples v cm = v ss t a = -40c to +125c v dd = 1.6v v dd = 5.5v 0% 2% 4% 6% 8% 10% 12% 14% 16% 18% 20% -0.060 -0.056 -0.052 -0.048 -0.044 -0.040 -0.036 -0.032 -0.028 -0.024 -0.020 -0.016 input hysteresis voltage ? quadratic temp. co.; tc 2 (v/c 2 ) percentage of occurrences 596 samples v cm = v ss t a = -40c to +125c v dd = 5.5v v dd = 1.6v
mcp6541/1r/1u/2/3/4 ds21696g-page 8 ? 2011 microchip technology inc. note: unless otherwise indicated, v dd = +1.6v to +5.5v, v ss = gnd, t a =25c, v in +=v dd /2, v in ? = gnd, r l =100k ? to v dd /2, and c l =36pf. figure 2-7: input offset voltage vs. ambient temperature at v cm =v ss . figure 2-8: input offset voltage vs. common mode input voltage at v dd =1.6v. figure 2-9: input offset voltage vs. common mode input voltage at v dd = 5.5v. figure 2-10: input hysteresis voltage vs. ambient temperature at v cm =v ss . figure 2-11: input hysteresis voltage vs. common mode input voltage at v dd =1.6v. figure 2-12: input hysteresis voltage vs. common mode input voltage at v dd =5.5v. -1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 -50-25 0 255075100125 ambient temperature (c) input offset voltage (mv) v dd = 1.6v v dd = 5.5v v cm = v ss -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 common mode input voltage (v) input offset voltage (mv) v dd = 1.6v t a = +125c t a = +85c t a = +25c t a = -40c t a = +125c -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 common mode input voltage (v) input offset voltage (mv) v dd = 5.5v t a = +85c t a = +125c t a = -40c t a = +25c 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 -50 -25 0 25 50 75 100 125 ambient temperature (c) input hysteresis voltage (mv) v dd = 1.6v v dd = 5.5v v cm = v ss 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 common mode input voltage (v) input hysteresis voltage (mv) t a = -40c t a = +125c t a = +85c t a = +25c v dd = 1.6v 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 common mode input voltage (v) input hysteresis voltage (mv) v dd = 5.5v t a = +125c t a = +85c t a = +25c t a = -40c
? 2011 microchip technology inc. ds21696g-page 9 mcp6541/1r/1u/2/3/4 note: unless otherwise indicated, v dd =+1.6v to +5.5v, v ss = gnd, t a =25c, v in +=v dd /2, v in ? = gnd, r l =100k ? to v dd /2, and c l =36pf. figure 2-13: cmrr, psrr vs. ambient temperature. figure 2-14: input bias current, input offset current vs. ambient temperature. figure 2-15: quiescent current vs. common mode input voltage at v dd =1.6v. figure 2-16: input bias current, input offset current vs. common mode input voltage. figure 2-17: quiescent current vs. power supply voltage. figure 2-18: quiescent current vs. common mode input voltage at v dd =5.5v. 55 60 65 70 75 80 85 90 -50-25 0 255075100125 ambient temperature (c) cmrr, psrr (db) input referred psrr, v in + = v ss , v dd = 1.6v to 5.5v cmrr, v in + = -0.3 to 5.3v, v dd = 5.0v 0.1 1 10 100 1000 55 65 75 85 95 105 115 125 ambient temperature (c) input bias, offset currents (pa) i b | i os | v dd = 5.5v v cm = v dd 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.00.20.40.60.81.01.21.41.6 common mode input voltage (v) quiescent current per comparator (a) v dd = 1.6v sweep v in +, v in ? = v dd /2 sweep v in ?, v in + = v dd /2 0.1 1 10 100 1000 10000 0.00.51.01.52.02.53.03.54.04.55.05.5 common mode input voltage (v) input bias, offset currents (a) v dd = 5.5v 100f 100p 1p 10p 1n 10n i b , t a = +125c i b , t a = +85c i os , t a = +125c i os , t a = +85c 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.00.51.01.52.02.53.03.54.04.55.05.5 power supply voltage (v) quiescent current per comparator (a) t a = +125c t a = +85c t a = +25c t a = -40c 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.00.51.01.52.02.53.03.54.04.55.05.5 common mode input voltage (v) quiescent current per comparator (a) v dd = 5.5v sweep v in +, v in ? = v dd /2 sweep v in ?, v in + = v dd /2
mcp6541/1r/1u/2/3/4 ds21696g-page 10 ? 2011 microchip technology inc. note: unless otherwise indicated, v dd = +1.6v to +5.5v, v ss = gnd, t a =25c, v in +=v dd /2, v in ? = gnd, r l =100k ? to v dd /2, and c l =36pf. figure 2-19: supply current vs. toggle frequency. figure 2-20: output voltage headroom vs. output current at v dd =1.6v. figure 2-21: high-to-low propagation delay. figure 2-22: output short circuit current magnitude vs. power supply voltage. figure 2-23: output voltage headroom vs. output current at v dd =5.5v. figure 2-24: low-to-high propagation delay. 0.1 1 10 0.1 1 10 100 toggle frequency (khz) supply current (a) v dd = 5.5v v dd = 1.6v 100 mv overdrive v cm = v dd /2 r l = infinity 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.00.51.01.52.02.53.0 output current (ma) output voltage headroom (v) v dd = 1.6v v ol ?v ss : t a = +125c t a = +85c t a = +25c t a = -40c t a = +125c t a = +85c t a = +25c t a = -40c v dd ?v oh : 0% 5% 10% 15% 20% 25% 30% 35% 40% 45% 012345678 high-to-low propagation delay (s) percentage of occurrences 600 samples 100 mv overdrive v cm = v dd /2 v dd = 5.5v v dd = 1.6v 0 5 10 15 20 25 30 35 0.00.51.01.52.02.53.03.54.04.55.05.5 power supply voltage (v) output short circuit current magnitude (ma) t a = -40c t a = +25c t a = +85c t a = +125c 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 5 10 15 20 25 output current (ma) output voltage headroom (v) v dd = 5.5v t a = +125c t a = +85c t a = +25c t a = -40c v dd ? v oh : t a = +125c t a = +85c t a = +25c t a = -40c v ol ? v ss : 0% 5% 10% 15% 20% 25% 30% 35% 40% 45% 012345678 low-to-high propagation delay (s) percentage of occurrences 600 samples 100 mv overdrive v cm = v dd /2 v dd = 5.5v v dd = 1.6v
? 2011 microchip technology inc. ds21696g-page 11 mcp6541/1r/1u/2/3/4 note: unless otherwise indicated, v dd =+1.6v to +5.5v, v ss = gnd, t a =25c, v in +=v dd /2, v in ? = gnd, r l =100k ? to v dd /2, and c l =36pf. figure 2-25: propagation delay skew. figure 2-26: propagation delay vs. power supply voltage. figure 2-27: propagation delay vs. common mode input voltage at v dd =1.6v. figure 2-28: propagation delay vs. ambient temperature. figure 2-29: propagation delay vs. input overdrive. figure 2-30: propagation delay vs. common mode input voltage at v dd =5.5v. 0% 5% 10% 15% 20% 25% 30% 35% 40% 45% -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 propagation delay skew (s) percentage of occurrences 600 samples 100 mv overdrive v cm = v dd /2 v dd = 1.6v v dd = 5.5v 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1.52.02.53.03.54.04.55.05.5 power supply voltage (v) propagation delay (s) v cm = v dd /2 t plh @ 100 mv overdrive t phl @ 100 mv overdrive t plh @ 10 mv overdrive t phl @ 10 mv overdrive 0 1 2 3 4 5 6 7 8 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 common mode input voltage (v) propagation delay (s) v dd = 1.6v 100 mv overdrive t plh t phl 0 1 2 3 4 5 6 7 8 -50 -25 0 25 50 75 100 125 ambient temperature (c) propagation delay (s) 100 mv overdrive v cm = v dd /2 t plh @ v dd = 1.6v t phl @ v dd = 1.6v t plh @ v dd = 5.5v t phl @ v dd = 5.5v 1 10 100 1 10 100 1000 input overdrive (mv) propagation delay (s) v cm = v dd /2 t phl @ v dd = 5.5v t plh @ v dd = 1.6v t phl @ v dd = 1.6v t plh @ v dd = 5.5v 0 1 2 3 4 5 6 7 8 0.00.51.01.52.02.53.03.54.04.55.05.5 common mode input voltage (v) propagation delay (s) v dd = 5.5v 100 mv overdrive t phl t plh
mcp6541/1r/1u/2/3/4 ds21696g-page 12 ? 2011 microchip technology inc. note: unless otherwise indicated, v dd = +1.6v to +5.5v, v ss = gnd, t a =25c, v in +=v dd /2, v in ? = gnd, r l =100k ? to v dd /2, and c l =36pf. figure 2-31: propagation delay vs. load capacitance. figure 2-32: supply current (shoot through current) vs. chip select (cs ) voltage at v dd = 1.6v (mcp6543 only). figure 2-33: supply current (charging current) vs. chip select (cs ) pulse at v dd =1.6v (mcp6543 only). figure 2-34: chip select (cs ) step response (mcp6543 only). figure 2-35: supply current (shoot through current) vs. chip select (cs ) voltage at v dd = 5.5v (mcp6543 only). figure 2-36: supply current (charging current) vs. chip select (cs ) pulse at v dd =5.5v (mcp6543 only). 0 5 10 15 20 25 30 35 40 45 50 0 102030405060708090 load capacitance (nf) propagation delay (s) 100 mv overdrive v cm = v dd /2 t phl @ v dd = 1.6v t plh @ v dd = 1.6v t plh @ v dd = 5.5v t phl @ v dd = 5.5v 1.e-11 1.e-10 1.e-09 1.e-08 1.e-07 1.e-06 1.e-05 1.e-04 1.e-03 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 chip select (cs) voltage (v) supply current per comparator (a) comparato r shuts of f comparator turns on v dd = 1.6v cs hysteresis cs high-to-low cs low-to-high 1m 1 10 100n 1n 10n 100p 10p 100 0 5 10 15 20 25 30 01234567891011121314 time (1 ms/div) supply current (a) -8.1 -6.5 -4.9 -3.2 -1.6 0.0 1.6 output voltage, chip select voltage (v), start-up i dd charging output capacitance v dd = 1.6v v out cs -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 012345678910 time (ms) chip select, output voltage (v) v out v dd = 5.5v cs 1.e-11 1.e-10 1.e-09 1.e-08 1.e-07 1.e-06 1.e-05 1.e-04 1.e-03 0.00.51.01.52.02.53.03.54.04.55.05.5 chip select (cs) voltage (v) supply current per comparator (a) comparato r shuts of f comparator turns on v dd = 5.5v 1m 1 10 100n 1n 10n 100p 10p cs low-to-high cs hysteresis cs high-to-low 100 0 20 40 60 80 100 120 140 160 180 200 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 time (0.5 ms/div) supply current per comparator (a) -24 -21 -18 -15 -12 -9 -6 -3 0 3 6 output voltage, chip select voltage (v) start-up i dd charging output capacitance v dd = 5.5v v out cs
? 2011 microchip technology inc. ds21696g-page 13 mcp6541/1r/1u/2/3/4 note: unless otherwise indicated, v dd =+1.6v to +5.5v, v ss = gnd, t a =25c, v in +=v dd /2, v in ? = gnd, r l =100k ? to v dd /2, and c l =36pf. figure 2-37: input bias current vs. input voltage. 1.e-12 1.e-11 1.e-10 1.e-09 1.e-08 1.e-07 1.e-06 1.e-05 1.e-04 1.e-03 1.e-02 -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 input voltage (v) input current magnitude (a) +125c +85c +25c -40c 10m 1m 100 10 1 100n 10n 1n 100p 10p 1p
mcp6541/1r/1u/2/3/4 ds21696g-page 14 ? 2011 microchip technology inc. notes:
? 2011 microchip technology inc. ds21696g-page 15 mcp6541/1r/1u/2/3/4 3.0 pin descriptions descriptions of the pins are listed in table 3-1 . table 3-1: pin function table 3.1 analog inputs the comparator non-inverting and inverting inputs are high-impedance cmos inputs with low bias currents. 3.2 cs digital input this is a cmos, schmitt-triggered input that places the part into a low-power mode of operation. 3.3 digital outputs the comparator outputs are cmos, push-pull digital outputs. they are designed to be compatible with cmos and ttl logic and are capable of driving heavy dc or capacitive loads. 3.4 power supply (v ss and v dd ) the positive power supply pin (v dd ) is 1.6v to 5.5v higher than the negative power supply pin (v ss ). for normal operation, the other pins are at voltages between v ss and v dd . typically, these parts are used in a single (positive) supply configuration. in this case, v ss is connected to ground and v dd is connected to the supply. v dd will need a local bypass capacitor (typically 0.01 f to 0.1f) within 2mm of the v dd pin. these can share a bulk capacitor with nearby analog parts (within 100 mm), but it is not required. mcp6541 pdip, soic, msop mcp6541 sot-23-5, sc-70-5 MCP6541R mcp6541u mcp6542 mcp6543 mcp6544 symbol description 6 1 14161out, outadigital output (comparator a) 2 4 43222v in ?, v ina ? inverting input (comparator a) 3 3 31333v in +, v ina + non-inverting input (comparator a) 7 5 25874 v dd positive power supply ????5?5v inb + non-inverting input (comparator b) ????6?6v inb ? inverting input (comparator b) ? ? ? ? 7 ? 7 outb digital output (comparator b) ? ? ? ? ? ? 8 outc digital output (comparator c) ??????9v inc ? inverting input (comparator c) ??????10v inc + non-inverting input (comparator c) 4 2 524411 v ss negative power supply ??????12v ind + non-inverting input (comparator d) ??????13v ind ? inverting input (comparator d) ? ? ? ? ? ? 14 outd digital output (comparator d) ?????8?cs chip select 1, 5, 8 ? ? ? ? 1, 5 ? nc no internal connection
mcp6541/1r/1u/2/3/4 ds21696g-page 16 ? 2011 microchip technology inc. notes:
? 2011 microchip technology inc. ds21696g-page 17 mcp6541/1r/1u/2/3/4 4.0 applications information the mcp6541/1r/1u/2/3/4 family of push-pull output comparators are fabricated on microchip?s state-of-the- art cmos process. they are suitable for a wide range of applications requiring very low-power consumption. 4.1 comparator inputs 4.1.1 phase reversal the mcp6541/1r/1u/2/3/4 comparator family uses cmos transistors at the input. they are designed to prevent phase inversion when the input pins exceed the supply voltages. figure 2-3 shows an input voltage exceeding both supplies with no resulting phase inversion. 4.1.2 input voltage and current limits the esd protection on the inputs can be depicted as shown in figure 4-1 . this structure was chosen to protect the input transistors, and to minimize input bias current (ib). the input esd diodes clamp the inputs when they try to go more than one diode drop below v ss . they also clamp any voltages that go too far above v dd ; their breakdown voltage is high enough to allow normal operation, and low enough to bypass esd events within the specified limits. figure 4-1: simplified analog input esd structures. in order to prevent damage and/or improper operation of these amplifiers, the circuits they are in must limit the currents (and voltages) at the v in + and v in ? pins (see absolute maximum ratings ? at the beginning of section 1.0 ?electrical characteristics? ). figure 4-3 shows the recommended approach to protecting these inputs. the internal esd diodes prevent the input pins (v in + and v in ?) from going too far below ground, and the resistors r 1 and r 2 limit the possible current drawn out of the input pin. diodes d 1 and d 2 prevent the input pin (v in + and v in ?) from going too far above v dd . when implemented as shown, resistors r 1 and r 2 also limit the current through d 1 and d 2 . figure 4-2: protecting the analog inputs. it is also possible to connect the diodes to the left of the resistors r 1 and r 2 . in this case, the currents through the diodes d 1 and d 2 need to be limited by some other mechanism. the resistor then serves as in-rush current limiter; the dc current into the input pins (v in + and v in ?) should be very small. a significant amount of current can flow out of the inputs when the common mode voltage (v cm ) is below ground (v ss ); see figure 2-37 . applications that are high-impedance may need to limit the usable voltage range. 4.1.3 normal operation the input stage of this family of devices uses two differential input stages in parallel: one operates at low input voltages and the other at high input voltages. with this topology, the input voltage is 0.3v above v dd and 0.3v below v ss . therefore, the input offset voltage is measured at both v ss - 0.3v and v dd + 0.3v to ensure proper operation. the mcp6541/1r/1u/2/3/4 family has internally-set hysteresis that is small enough to maintain input offset accuracy (<7 mv) and large enough to eliminate output chattering caused by the comparator?s own input noise voltage (200 v p-p ). figure 4-3 depicts this behavior. bond pad bond pad bond pad v dd v in + v ss input stage bond pad v in ? v 1 mcp6g0x r 1 v dd d 1 r 2 ? v ss ? (minimum expected v 2 ) 2ma v out v 2 r 2 r 3 d 2 + ? r 1 ? v ss ? (minimum expected v 1 ) 2ma
mcp6541/1r/1u/2/3/4 ds21696g-page 18 ? 2011 microchip technology inc. figure 4-3: the mcp6541/1r/1u/2/3/4 comparators? internal hysteresis eliminates output chatter caused by input noise voltage. 4.2 push-pull output the push-pull output is designed to be compatible with cmos and ttl logic, while the output transistors are configured to give rail-to-rail output performance. they are driven with circuitry that minimizes any switching current (shoot-through current from supply-to-supply) when the output is transitioned from high-to-low, or from low-to-high (see figures 2-15 , 2-18 , 2-32 through 2-36 for more information). 4.3 mcp6543 chip select (cs ) the mcp6543 is a single comparator with chip select (cs ). when cs is pulled high, the total current consumption drops to 20 pa (typ.); 1 pa (typ.) flows through the cs pin, 1 pa (typ.) flows through the out- put pin and 18 pa (typ.) flows through the v dd pin, as shown in figure 1-1 . when this happens, the comparator output is put into a high-impedance state. by pulling cs low, the comparator is enabled. if the cs pin is left floating, the comparator will not operate properly. figure 1-1 shows the output voltage and supply current response to a cs pulse. the internal cs circuitry is designed to minimize glitches when cycling the cs pin. this helps conserve power, which is especially important in battery-powered applications. 4.4 externally set hysteresis greater flexibility in selecting hysteresis (or input trip points) is achieved by using external resistors. input offset voltage (v os ) is the center (average) of the (input-referred) low-high and high-low trip points. input hysteresis voltage (v hyst ) is the difference between the same trip points. hysteresis reduces output chattering when one input is slowly moving past the other and thus reduces dynamic supply current. it also helps in systems where it is best not to cycle between states too frequently (e.g., air conditioner thermostatic control). 4.4.1 non-inverting circuit figure 4-4 shows a non-inverting circuit for single- supply applications using just two resistors. the resulting hysteresis diagram is shown in figure 4-5 . figure 4-4: non-inverting circuit with hysteresis for single-supply. figure 4-5: hysteresis diagram for the non-inverting circuit. the trip points for figures 4-4 and 4-5 are: -3 -2 -1 0 1 2 3 4 5 6 7 8 time (100 ms/div) output voltage (v) -30 -25 -20 -15 -10 -5 0 5 10 15 20 25 input voltage (10 mv/div) v out v in ? v dd = 5.0v hysteresis v ref v in v out mcp654x v dd r 1 r f + - v out high-to-low low-to-high v dd v oh v ol v ss v ss v dd v thl v tlh v in
? 2011 microchip technology inc. ds21696g-page 19 mcp6541/1r/1u/2/3/4 equation 4-1: v tlh v ref 1 r 1 r f ------- + ?? ?? ?? v ol r 1 r f ------- ?? ?? ?? ? = v thl v ref 1 r 1 r f ------- + ?? ?? ?? v oh r 1 r f ------- ?? ?? ?? ? = v tlh = trip voltage from low-to-high v thl = trip voltage from high-to-low
mcp6541/1r/1u/2/3/4 ds21696g-page 20 ? 2011 microchip technology inc. 4.4.2 inverting circuit figure 4-6 shows an inverting circuit for single-supply using three resistors. the resulting hysteresis diagram is shown in figure 4-7 . figure 4-6: inverting circuit with hysteresis. figure 4-7: hysteresis diagram for the inverting circuit. in order to determine the trip voltages (v thl and v tlh ) for the circuit shown in figure 4-6 , r 2 and r 3 can be simplified to the thevenin equivalent circuit with respect to v dd , as shown in figure 4-8 . figure 4-8: thevenin equivalent circuit. where: using this simplified circuit, the trip voltage can be calculated using the following equation: equation 4-2: figure 2-20 and figure 2-23 can be used to determine typical values for v oh and v ol . 4.5 bypass capacitors with this family of comparators, the power supply pin (v dd for single supply) should have a local bypass capacitor (i.e., 0.01 f to 0.1 f) within 2 mm for good edge rate performance. 4.6 capacitive loads reasonable capacitive loads (e.g., logic gates) have little impact on propagation delay (see figure 2-31 ). the supply current increases with increasing toggle frequency ( figure 2-19 ), especially with higher capacitive loads. 4.7 battery life in order to maximize battery life in portable applications, use large resistors and small capacitive loads. avoid toggling the output more than necessary. do not use chip select (cs ) frequently to conserve start-up power. capacitive loads will draw additional power at start-up. v in v out mcp654x v dd r 2 r f r 3 v dd v out high-to-low low-to-high v dd v oh v ol v ss v ss v dd v tlh v thl v in v 23 v out mcp654x v dd r 23 r f + - v ss r 23 r 2 r 3 r 2 r 3 + ------------------ = v 23 r 3 r 2 r 3 + ------------------ v dd ? = v thl v oh r 23 r 23 r f + ---------------------- - ?? ?? ?? v 23 r f r 23 r f + --------------------- - ?? ?? + = v tlh v ol r 23 r 23 r f + ---------------------- - ?? ?? ?? v 23 r f r 23 r f + --------------------- - ?? ?? + = v tlh = trip voltage from low-to-high v thl = trip voltage from high-to-low
? 2011 microchip technology inc. ds21696g-page 21 mcp6541/1r/1u/2/3/4 4.8 pcb surface leakage in applications where low input bias current is critical, pcb (printed circuit board) surface leakage effects need to be considered. surface leakage is caused by humidity, dust or other contamination on the board. under low humidity conditions, a typical resistance between nearby traces is 10 12 ? . a 5v difference would cause 5 pa of current to flow. this is greater than the mcp6541/1r/1u/2/3/4 family?s bias current at 25c (1 pa, typ.). the easiest way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). the guard ring is biased at the same voltage as the sensitive pin. an example of this type of layout is shown in figure 4-9 . figure 4-9: example guard ring layout for inverting circuit. 1. inverting configuration (figures 4-6 and 4-9 ): a. connect the guard ring to the non-inverting input pin (v in +). this biases the guard ring to the same reference voltage as the comparator (e.g., v dd /2 or ground). b. connect the inverting pin (v in ?) to the input pad without touching the guard ring. 2. non-inverting configuration ( figure 4-4 ): a. connect the non-inverting pin (v in +) to the input pad without touching the guard ring. b. connect the guard ring to the inverting input pin (v in ?). 4.9 unused comparators an unused amplifier in a quad package (mcp6544) should be configured as shown in figure 4-10 . this circuit prevents the output from toggling and causing crosstalk. it uses the minimum number of components and draws minimal current (see figure 2-15 and figure 2-18 ). figure 4-10: unused comparators. guard ring v ss v in -v in + ? mcp6544 v dd ? +
mcp6541/1r/1u/2/3/4 ds21696g-page 22 ? 2011 microchip technology inc. 4.10 typical applications 4.10.1 precise comparator some applications require higher dc precision. an easy way to solve this problem is to use an amplifier (such as the mcp6041) to gain-up the input signal before it reaches the comparator. figure 4-11 shows an example of this approach. figure 4-11: precise inverting comparator. 4.10.2 windowed comparator figure 4-12 shows one approach to designing a win- dowed comparator. the and gate produces a logic ? 1 ? when the input voltage is between v rb and v rt (where v rt > v rb ). figure 4-12: windowed comparator. 4.10.3 bistable multi-vibrator a simple bistable multi-vibrator design is shown in figure 4-13 . v ref needs to be between the power supplies (v ss = gnd and v dd ) to achieve oscillation. the output duty cycle changes with v ref . figure 4-13: bistable multi-vibrator. v ref v dd v dd r 1 r 2 v out v in v ref mcp6041 mcp654x v rt mcp6542 v rb v in 1/2 mcp6542 1/2 mcp6541 v dd r 1 r 2 r 3 v ref c 1 v out
? 2011 microchip technology inc. ds21696g-page 23 mcp6541/1r/1u/2/3/4 5.0 packaging information 5.1 package marking information xxxxxxxx xxxxxnnn yyww 8-lead pdip (300 mil) example : 8-lead soic (150 mil) example : xxxxxxxx xxxxyyww nnn mcp6541 i/p256 1102 mcp6542 i/sn1102 256 8-lead msop example : xxxxxx ywwnnn 6543 i 102256 5-lead sot-23 (mcp6541, MCP6541R, mcp6541u) example: xxnn ab25 5-lead sc-70 ( mcp6541 ) example: xxnn front) yww (back) ba25 front) 102 (back) device i-temp code e-temp code mcp6541 abnn gtnn MCP6541R agnn gunn mcp6541u ? atnn note: applies to 5-lead sot-23 device i-temp code e-temp code mcp6541u bann note 2 note 1: i-temp parts prior to march 2005 are marked ?ban? 2: sc-70-5 e-temp parts not available at this release of this data sheet. legend: xx...x customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code pb-free jedec designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e mcp6541 e/p ^^ 256 1102 mcp6541 e sn ^^ 1102 256 or or 3 e 3 e 6543 e 102256 or
mcp6541/1r/1u/2/3/4 ds21696g-page 24 ? 2011 microchip technology inc. package marking information (continued) 14-lead pdip (300 mil) (mcp6544) example: 14-lead tssop (mcp6544) example: xxxxxxxxxxxxxx xxxxxxxxxxxxxx yywwnnn xxxxxxxx yyww nnn mcp6544 -i/p 110256 mcp6544 i 1102 256 mcp6544 e/p 1102256 or 3 e mcp6544 i/p 1102256 or 3 e 14-lead soic (150 mil) (mcp6544) example: xxxxxxxxxx yywwnnn xxxxxxxxxx mcp6544 isl 1102256 mcp6544 1102256 i/sl ^^ or 3 e or mcp6544 1102256 e/sl ^^ 3 e mcp6544 e 1102 256 or
? 2011 microchip technology inc. ds21696g-page 25 mcp6541/1r/1u/2/3/4 d b 1 2 3 e1 e 4 5 ee c l a1 aa2
mcp6541/1r/1u/2/3/4 ds21696g-page 26 ? 2011 microchip technology inc.
? 2011 microchip technology inc. ds21696g-page 27 mcp6541/1r/1u/2/3/4 n b e e1 d 1 2 3 e e1 a a1 a2 c l l1
mcp6541/1r/1u/2/3/4 ds21696g-page 28 ? 2011 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2011 microchip technology inc. ds21696g-page 29 mcp6541/1r/1u/2/3/4 n e1 note 1 d 12 3 a a1 a2 l b1 b e e eb c
mcp6541/1r/1u/2/3/4 ds21696g-page 30 ? 2011 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2011 microchip technology inc. ds21696g-page 31 mcp6541/1r/1u/2/3/4 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
mcp6541/1r/1u/2/3/4 ds21696g-page 32 ? 2011 microchip technology inc.
? 2011 microchip technology inc. ds21696g-page 33 mcp6541/1r/1u/2/3/4 d n e e1 note 1 1 2 e b a a1 a2 c l1 l
mcp6541/1r/1u/2/3/4 ds21696g-page 34 ? 2011 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2011 microchip technology inc. ds21696g-page 35 mcp6541/1r/1u/2/3/4 n e1 d note 1 12 3 e c eb a2 l a a1 b1 be
mcp6541/1r/1u/2/3/4 ds21696g-page 36 ? 2011 microchip technology inc. note 1 n d e e1 1 23 b e a a1 a2 l l1 c h h
? 2011 microchip technology inc. ds21696g-page 37 mcp6541/1r/1u/2/3/4
mcp6541/1r/1u/2/3/4 ds21696g-page 38 ? 2011 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2011 microchip technology inc. ds21696g-page 39 mcp6541/1r/1u/2/3/4 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
mcp6541/1r/1u/2/3/4 ds21696g-page 40 ? 2011 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2011 microchip technology inc. ds21696g-page 41 mcp6541/1r/1u/2/3/4 appendix a: revision history revision g (march 2011) the following is the list of modifications: 1. updated the marking information for the 5-lead sc-70 package in section 5.1 ?package marking information? . revision f (september 2007) 1. corrected polarity of mcp6541u sot-23-5 pin out diagram on front page. 2. section 5.1 ?package marking information? : updated package outline drawings per marcom. revision e (september 2006) the following is the list of modifications: 1. added mcp6541u pinout for the sot-23-5 package. 2. clarified absolute maximum analog input voltage and current specifications. 3. added applications write-ups on unused comparators. 4. added disclaimer to package outline drawings. revision d (may 2006) the following is the list of modifications: 1. added e-temp parts. 2. changed v hyst temperature specification to linear and quadratic temperature coefficients. 3. changed specifications and plots for e-temp. 4. added section 3.0 pin descriptions 5. corrected package marking (see section 5.1 ?package marking information? ) 6. added appendix a: revision history. revision c (september 2003) revision b (november 2002) revision a (march 2002) ? original release of this document.
mcp6541/1r/1u/2/3/4 ds21696g-page 42 ? 2011 microchip technology inc. notes:
? 2011 microchip technology inc. ds21696g-page 43 mcp6541/1r/1u/2/3/4 product identification system to order or obtain information, e. g., on pricing or delivery, refer to the factory or the listed sales office . device: mcp6541: single comparator mcp6541t: single comparator (tape and reel) (sc-70, sot-23, soic, msop) MCP6541Rt: single comparator (rotated - tape and reel) (sot-23 only) mcp6541ut: single comparator (tape and reel) (sot-23-5 is e-temp only) mcp6542: dual comparator mcp6542t: dual comparator (tape and reel for soic and msop) mcp6543: single comparator with cs mcp6543t: single comparator with cs (tape and reel for soic and msop) mcp6544: quad comparator mcp6544t: quad comparator (tape and reel for soic and tssop) temperature range: i = -40c to +85c e * = -40c to +125c * sc-70-5 e-temp parts not available at this release of the data sheet. package: lt = plastic package (sc-70), 5-lead ot = plastic small outline transistor (sot-23), 5-lead ms = plastic msop, 8-lead p = plastic dip (300 mil body), 8-lead, 14-lead sn = plastic soic (150 mil body), 8-lead sl = plastic soic (150 mil body), 14-lead (mcp6544) st = plastic tssop (4.4mm body), 14-lead (mcp6544) part no. -x /xx package te mpe rature range device examples: a) mcp6541t-i/lt: tape and reel, industrial temperature, 5ld sc-70. b) mcp6541t-i/ot: tape and reel, industrial temperature, 5ld sot-23. c) mcp6541-e/p: extended temperature, 8ld pdip. d) MCP6541Rt-i/ot: tape and reel, industrial temperature, 5ld sot23. e) mcp6541-e/sn: extended temperature, 8ld soic. f) mcp6541ut-e/ot:tape and reel, extended temperature, 5ld sot23. a) mcp6542-i/ms: industrial temperature, 8ld msop. b) mcp6542t-i/ms: tape and reel, industrial temperature, 8ld msop. c) mcp6542-i/p: industrial temperature, 8ld pdip. d) mcp6542-e/sn: extended temperature, 8ld soic. a) mcp6543-i/sn: industrial temperature, 8ld soic. b) mcp6543t-i/sn: tape and reel, industrial temperature, 8ld soic. c) mcp6543-i/p: industrial temperature, 8ld pdip. d) mcp6543-e/sn: extended temperature, 8ld soic. a) mcp6544t-i/sl: tape and reel, industrial temperature, 14ld soic. b) mcp6544t-e/sl: tape and reel, extended temperature, 14ld soic. c) mcp6544-i/p: industrial temperature, 14ld pdip. d) mcp6544t-e/st: tape and reel, extended temperature, 14ld tssop.
mcp6541/1r/1u/2/3/4 ds21696g-page 44 ? 2011 microchip technology inc. notes:
? 2011 microchip technology inc. ds21696g-page 45 information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safety applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting from such use. no licenses are conveyed, implicitly or otherwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, dspic, k ee l oq , k ee l oq logo, mplab, pic, picmicro, picstart, pic 32 logo, rfpic and uni/o are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. filterlab, hampshire, hi-tech c, linear active thermistor, mxdev, mxlab, seeval and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, appl ication maestro, codeguard, dspicdem, dspicdem.net, dspicworks, dsspeak, ecan, economonitor, fansense, hi-tide, in-circuit serial programming, icsp, mindi, miwi, mpasm, mplab certified logo, mplib, mplink, mtouch, omniscient code generation, picc, picc-18, picdem, picdem.net, pickit, pictail, real ice, rflab, select mode, total endurance, tsharc, uniwindriver, wiperlock and zena are trademarks of microchip tec hnology incorporated in the u.s.a. and other countries. sqtp is a service mark of microchip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2011, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. isbn: 978-1-60932-933-4 note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip produc ts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are co mmitted to continuously improvin g the code protection features of our products. attempts to break microchip?s code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified.
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